Low dropout regulator and phase-locked loop

ABSTRACT

Embodiments of the present invention disclose a low dropout regulator and a phase-locked loop. The low dropout regulator includes: a reference voltage source, an error amplifier coupled to the reference voltage source, a regulating circuit, a load coupled to the regulating circuit, a first compensation circuit, and a second compensation circuit. The regulating circuit produces a regulating current under control of a control voltage from the error amplifier. The first compensation circuit is coupled between the error amplifier and the regulating circuit. The second compensation circuit is coupled between an input terminal and an output terminal of the regulating circuit.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation of U.S. patent application Ser. No. 15/857,037, filed on Dec. 28, 2017, which is a continuation of International Application No. PCT/CN2016/087707, filed on Jun. 29, 2016, which claims priority to Chinese Patent Application No. 201510374098.1, filed on Jun. 30, 2015. All of the afore-mentioned patent applications are hereby incorporated by reference in their entireties.

TECHNICAL FIELD

The present application relates to the semiconductor field, and in particular, to a low dropout regulator and a phase-locked loop.

BACKGROUND

A phase-locked loop (PLL) refers to an automatic control closed-loop system including a phase detector, a loop filter, a voltage control oscillator (VCO), and the like. The PLL can complete phase synchronization between two electrical signals, and therefore is widely applied to fields such as broadcast communication, frequency synthesis, automatic control, and clock synchronization. Stability of the PLL is affected by noise and fluctuation of a power source. Therefore, in actual application, a low dropout regulator (LDO) usually needs to be used to overcome impact of the noise and fluctuation of the power source on the PLL, to ensure a feature of a noise-sensitive circuit such as the PLL.

As shown in FIG. 1, a prior-art LDO may include a reference voltage source 101, an error amplifier 102, a compensation circuit 103, a transistor 104, a bleeder circuit 105, and a load 106. The compensation circuit includes a nulling resistor 1031 and a Miller compensation capacitor 1032, and the bleeder circuit includes a first bleeder resistor 1051 and a second bleeder resistor 1052. Due to existence of the compensation circuit, noise distribution of the prior-art LDO is shown in FIG. 1, where V_(n,op) ² equivalent input noise of the error amplifier 102, V_(n,bg) ² represents output noise of the reference voltage source 101, V_(nR1) ² represents thermal noise of the resistor 1051, and V_(n,R2) ² represents thermal noise of the resistor 1052. It can be learned from the noise distribution of the prior-art LDO that, in the prior-art LDO, noise performance of the LDO can be improved by significantly increasing a transconductance of the error amplifier.

However, a minimum value exists in layout implementation of the nulling resistor, and the minimum value is usually of a magnitude of 10 ohms; and a maximum value of a capacitance also exists in layout implementation of the Miller compensation capacitor. Therefore, a gain-bandwidth product of the error amplifier has a maximum value lower limit. A transconductance upper limit of the error amplifier is relatively low because the gain-bandwidth product of the error amplifier has a maximum value lower limit. Once the transconductance of the error amplifier exceeds the upper limit, system stability of the LDO is compromised.

Therefore, it can be learned that, because the transconductance upper limit of the error amplifier is relatively low, noise performance of the prior-art LDO is relatively poor.

SUMMARY

Embodiments of the present invention provide a low dropout regulator, a method for improving stability of the low dropout regulator, and a phase-locked loop, so as to overcome a problem of poor noise performance of a prior-art low dropout regulator.

According to a first aspect, an embodiment of the present invention provides a low dropout regulator, including: a reference voltage source, configured to provide a reference voltage; an error amplifier, coupled to the reference voltage source, and configured to receive a feedback voltage and the reference voltage, compare the feedback voltage with the reference voltage, and output a control voltage according to a result of comparing the feedback voltage with the reference voltage; a regulating circuit, coupled to the error amplifier, and configured to receive the control voltage, and output a regulating current under control of the control voltage; a load, coupled to the regulating circuit and the error amplifier, where an on-load voltage is formed when the regulating current passes through the load, and the feedback voltage is related to the on-load voltage; a first compensation circuit, coupled to the regulating circuit, and configured to regulate a dominant pole and a secondary dominant pole of the low dropout regulator, so as to regulate a phase margin; and a second compensation circuit, coupled to the first compensation circuit, and configured to: decrease the dominant pole of the low dropout regulator and further increase the secondary dominant pole on the basis that the first compensation circuit has regulated the dominant pole and the secondary dominant pole of the low dropout regulator, so as to regulate the phase margin; and regulate a gain-bandwidth product of the low dropout regulator.

With reference to the first aspect, in a first possible implementation manner of the first aspect, the regulating circuit includes a transistor.

With reference to the first possible implementation manner of the first aspect, in a second possible implementation manner of the first aspect, the first compensation circuit includes a nulling resistor and a Miller compensation capacitor, where a terminal of the Miller compensation capacitor is connected to a drain of the transistor, another terminal of the Miller compensation capacitor is connected to a terminal of the nulling resistor, and another terminal of the nulling resistor is connected to the second compensation circuit.

With reference to the second possible implementation manner of the first aspect, in a third possible implementation manner of the first aspect, the second compensation circuit includes a compensation resistor, where a terminal of the compensation resistor is connected to an output terminal of the error amplifier, and another terminal of the compensation resistor is connected to a terminal of the nulling resistor and a gate of the transistor.

With reference to the third possible implementation manner of the first aspect, in a fourth possible implementation manner of the first aspect, a resistance value of the compensation resistor is not less than a resistance value of an equivalent load resistor of the error amplifier and is less than or equal to R_(B-MAX), where R_(B-MAX) is a resistance value of the compensation resistor when noise reduced by the compensation resistor is equal to noise introduced by the compensation resistor, and the noise reduced by the compensation resistor is noise that is introduced by another component in the low dropout regulator and that is eliminated by the compensation resistor.

With reference to any one of the first aspect or the first to fourth possible implementation manners of the first aspect, in a fifth possible implementation manner of the first aspect, the low dropout regulator further includes a feedback circuit, where the feedback circuit is connected to the error amplifier and the load, and is configured to receive the on-load voltage and generate the feedback voltage according to the on-load voltage.

With reference to any one of the first aspect or the first to fifth possible implementation manners of the first aspect, in a sixth possible implementation manner of the first aspect, the low dropout regulator further includes a noise filter circuit, where the noise filter circuit is coupled to the reference voltage source and the error amplifier, and is configured to perform noise filtering on the reference voltage provided by the reference voltage source, and send, to the error amplifier, the reference voltage on which noise filtering is performed.

According to a second aspect, an embodiment of the present invention further provides a phase-locked loop, where the phase-locked loop includes the low dropout regulator according to any one of the first aspect or the possible implementation manners of the first aspect.

According to a third aspect, an embodiment of the present invention further provides a method for improving stability of a low dropout regulator, including: receiving a reference voltage and a feedback voltage; comparing the feedback voltage with the reference voltage, and generating a control voltage according to a result of comparing the feedback voltage with the reference voltage; generating a regulating current under control of the control voltage; regulating a dominant pole and a secondary dominant pole of the low dropout regulator according to the regulating current; and further regulating the dominant pole and the secondary dominant pole of the low dropout regulator according to the regulating current on the basis that the dominant pole and the secondary dominant pole of the low dropout regulator are regulated according to the regulating current, and regulating a gain-bandwidth product of the low dropout regulator according to the regulating current.

With reference to the third aspect, in a first possible implementation manner of the third aspect, after the receiving a reference voltage and a feedback voltage, the method further includes: performing noise filtering on the reference voltage; and the comparing the feedback voltage with the reference voltage includes: comparing the feedback voltage with the reference voltage on which noise filtering is performed.

The low dropout regulator in the embodiments of the present invention includes: a reference voltage source, configured to provide a reference voltage; an error amplifier, coupled to the reference voltage source, and configured to receive a feedback voltage and the reference voltage, compare the feedback voltage with the reference voltage, and output a control voltage according to a result of comparing the feedback voltage with the reference voltage; a regulating circuit, coupled to the error amplifier, and configured to receive the control voltage, and output a regulating current under control of the control voltage; a load, coupled to the regulating circuit and the error amplifier, where an on-load voltage is formed when the regulating current passes through the load, and the feedback voltage is related to the on-load voltage; a first compensation circuit, coupled to the regulating circuit, and configured to regulate a dominant pole and a secondary dominant pole of the low dropout regulator, so as to regulate a phase margin; and a second compensation circuit, coupled to the first compensation circuit, and configured to: decrease the dominant pole of the low dropout regulator and further increase the secondary dominant pole on the basis that the first compensation circuit has regulated the dominant pole and the secondary dominant pole of the low dropout regulator, so as to regulate the phase margin; and regulate a gain-bandwidth product of the low dropout regulator. Because the second compensation circuit is added, by using the low dropout regulator provided in the embodiments of the present invention, a value of the gain-bandwidth product and a size of the dominant pole can be significantly reduced, and a size of the secondary dominant pole can be increased. Therefore, by introducing the second compensation circuit, system stability of the low dropout regulator can be greatly improved, and a transconductance of the error amplifier in the present invention can be greater than a transconductance of a prior-art error amplifier. Therefore, the error amplifier in the present invention has better noise performance.

BRIEF DESCRIPTION OF DRAWINGS

To describe the technical solutions in the embodiments of the present invention or in the prior art more clearly, the following briefly describes the accompanying drawings required for describing the embodiments or the prior art. Apparently, a person of ordinary skill in the art may still derive other drawings from these accompanying drawings without creative efforts.

FIG. 1 is a schematic structural diagram of a prior-art LDO;

FIG. 2 is a schematic structural diagram of an embodiment of an LDO according to the present invention;

FIG. 3 is a schematic structural diagram of another embodiment of an LDO according to the present invention;

FIG. 4 is a schematic structural diagram of an embodiment of an error amplifier in an LDO according to the present invention;

FIG. 5 is a schematic structural diagram of another embodiment of an LDO according to the present invention; and

FIG. 6 is a schematic flowchart of an embodiment of a method for improving stability of a low dropout regulator according to the present invention.

DESCRIPTION OF EMBODIMENTS

The following clearly describes the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Apparently, the described embodiments are merely a part rather than all of the embodiments of the present invention. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

Referring to FIG. 2, FIG. 2 is a schematic structural diagram of an embodiment of an LDO according to the present invention.

As shown in FIG. 2, the LDO according to the present invention may include: a reference voltage source 201, an error amplifier 202, a regulating circuit 203, a first compensation circuit 204, a second compensation circuit 205, and a load 206.

The reference voltage source 201 is configured to provide a reference voltage. The error amplifier 202 is coupled to the reference voltage source 201, and is configured to receive a feedback voltage and the reference voltage, compare the feedback voltage with the reference voltage, and output a control voltage according to a result of comparing the feedback voltage with the reference voltage. The regulating circuit 203 is coupled to the error amplifier 202, and is configured to receive the control voltage, and output a regulating current under control of the control voltage. The load 206 is coupled to the regulating circuit 203 and the error amplifier 202, where an on-load voltage is formed when the regulating current passes through the load 206. The first compensation circuit 204 is coupled to the regulating circuit 203, and is configured to regulate a dominant pole and a secondary dominant pole of the low dropout regulator, so as to regulate a phase margin. The second compensation circuit 205 is coupled to the first compensation circuit 204, and is configured to: further regulate the dominant pole and the secondary dominant pole on the basis that the first compensation circuit 204 has regulated the dominant pole and the secondary dominant pole of the low dropout regulator, so as to regulate the phase margin; and regulate a gain-bandwidth product of the low dropout regulator. The feedback voltage is related to the on-load voltage. This generally means that the feedback voltage and the on-load voltage are in a linear relationship. For example, the feedback voltage is the on-load voltage, or the feedback voltage is in a predetermined proportional relationship with the on-load voltage.

It should be noted herein that, decreasing a dominant pole means that a dominant pole, of the low dropout regulator, obtained through regulation by the first compensation circuit 204 is less than the dominant pole that has not been regulated by the first compensation circuit 204; increasing a secondary dominant pole means that a secondary dominant pole obtained through regulation by the first compensation circuit 204 is greater than the secondary dominant pole that has not been regulated by the first compensation circuit 204; and decreasing a gain-bandwidth product means that a gain-bandwidth product obtained through regulation by the first compensation circuit 204 is less than the gain-bandwidth product that has not been regulated by the first compensation circuit 204.

In specific implementation, a circuit structure of the LDO may be shown in FIG. 3.

A negative input of the error amplifier 202 is connected to the reference voltage source 201 and is configured to receive the reference voltage from the reference voltage source. A positive input of the error amplifier 202 is coupled to the load, and is configured to receive the feedback voltage.

The first compensation circuit 204 may be a Miller capacitor-nulling resistor compensation circuit. That is, the first compensation circuit 204 may include a nulling resistor 2041 and a Miller compensation capacitor 2042. The Miller compensation capacitor 2042 is connected to a drain of the transistor 203, and is further connected to a terminal of the nulling resistor 2041. Another terminal of the nulling resistor 2041 is connected to the second compensation circuit 205.

The regulating circuit 203 may be a power MOS device such as a transistor. The second compensation circuit 205 may include a compensation resistor 2051. A terminal of the compensation resistor 2051 is connected to an output terminal of the error amplifier 202, and another terminal of the compensation resistor 2051 is connected to a terminal of the nulling resistor 2041 and a gate of the regulating circuit 203. The compensation resistor 2051 may be a silicon diffusion resistor, a MOS device resistor, or a metal wiring resistor.

It can be obtained, according to load distribution of the LDO in the present invention by formulating and solving node current and voltage equations, that three poles of the LDO are:

${p_{1} \cong \frac{- 1}{g_{m\; 2}R_{LOAD}{C_{c}\left( {R_{1} + R_{B}} \right)}}};$ ${p_{2} \cong \frac{{- g_{m\; 2}}{C_{C}\left( {1 + {R_{B}/R_{1}}} \right)}}{{C_{1}C_{2}} + {C_{C}C_{1}} + {C_{C}C_{2}} + {g_{m\; 2}R_{B}C_{C}C_{1}}} \cong \frac{- {g_{m\; 2}\left( {1 + {R_{B}/R_{1}}} \right)}}{C_{2} + {g_{m\; 2}R_{B}C_{1}}}};{and}$ ${p_{3} \cong \frac{- \left( {1 + {g_{m\; 2}R_{B}{C_{o\; 1}/C_{o\; 2}}}} \right)}{R_{nl}C_{o\; 1}}};$

a zero point of the LDO is:

${z_{1} = \frac{1}{C_{C}\left( {{1/g_{m\; 2}} - R_{nl}} \right)}};$

and a GBW of the LDO may be represented as:

${{GBW} = {\frac{g_{m\; 1}}{C_{C}}\frac{R_{1}}{\left( {R_{1} + R_{B}} \right)}}},$

where

C_(C) is a capacitance value of the Miller compensation capacitor 2042, R_(nl) is a resistance value of the nulling resistor 2041, g_(m2) is a transconductance of the regulating circuit 203, g_(m1) is a transconductance of the error amplifier 202, R_(LOAD) is a load resistance value of the load, C_(LOAD) is a load capacitance value of the load 206, R₁ is a resistance value of an equivalent load resistor of the error amplifier 202, C₁ is a capacitance value of an equivalent load capacitor of the error amplifier 202, and R_(B) is a resistance value of the compensation resistor 2051.

It can be learned that, because the pole p2 is canceled by the zero point, the dominant pole of the LDO in the present invention is p1, and the secondary dominant pole is p3. In the LDO provided in this embodiment of the present invention, by adding the second compensation circuit, the gain-bandwidth product GBW and the dominant pole p1 can be significantly reduced, and the secondary dominant pole p3 can be increased. Therefore, by introducing the second compensation circuit, system stability is greatly improved, and a transconductance of the error amplifier in the present invention can be greater than a transconductance of a prior-art error amplifier. Therefore, the error amplifier in the present invention has better noise performance. In addition, introduction of the second compensation circuit not only can reduce an area of the LDO by reducing a value of C_(C), but also can increase a phase margin of the LDO by reducing the GBW of the LDO, thereby improving a load driving capability of the LDO.

Further, because a resistor also introduces noise, when the second compensation circuit is a compensation resistor, a formula of noise introduced by the compensation resistor may be represented as:

${\overset{\_}{V_{n,{out}}^{2}} = {\int\limits_{f_{1}}^{f_{2}}{\left( {\overset{\_}{V_{n,{ea}}^{2}} + {\left( {\frac{1}{{sRC} + 1}} \right)^{2}\overset{\_}{V_{n,{ref}}^{2}}} + {\overset{\_}{V_{n,{PFET}}^{2}}\frac{1}{A_{V}^{2}}} + {4{kTR}_{B}\frac{1}{A_{V}^{2}}}} \right){df}}}},$

where

V_(n,out) refers to output noise of the LDO, V_(n,ea) refers to noise introduced by the error amplifier 202, sRC refers to a time constant of a noise filter, V_(n,ref) refers to noise introduced by the reference voltage source 201, V_(n,PFET) refers to noise introduced by the transistor 203, A_(V) refers to a gain of the error amplifier 202, k refers to a Boltzmann constant, and T refers to a temperature.

Although noise introduced by another component of the LDO can be more reduced as the resistance value of the compensation resistor increases, it can be learned from the foregoing formulas that the noise introduced by the compensation resistor also increases as the resistance value of the compensation resistor increases, and when the resistance value of the compensation resistor exceeds a specific value, the noise introduced by the resistor may exceed noise reduced by the compensation resistor. The noise reduced by the compensation resistor refers to the noise that is introduced by the another component in the low dropout regulator and that is eliminated by the compensation resistor.

To prevent the compensation resistor from introducing too large noise, in actual usage, a value of R_(B) needs to be less than R_(B-MAX), and R_(B-MAX) refers to a resistance value of the compensation resistor 2051 when the noise reduced by the compensation resistor 2051 is equal to the noise introduced by the compensation resistor 2051. R_(B-MAX) may be calculated according to the noise introduced by the error amplifier 202, the noise introduced by the reference voltage source 201, the noise introduced by the transistor 203, and the gain of the error amplifier 202.

It can be learned from the formulas for calculating the poles that when R_(B)≥R₁, the GBW and P₁ start to change significantly. Therefore, usually, it may be set that R_(B)≥R₁. Therefore, a value range of R_(B) may be R₁>R_(B)>R_(B-MAX). When the value of R_(B) falls within this range, noise of the LDO can be effectively reduced.

To further improve noise performance of the LDO, as shown in FIG. 4, the error amplifier 202 may include a bias current source 2021, an input tube 2022, and an output current mirror 2023. The input tube 2022 is coupled between the bias current source 2021 and the output current mirror 2023.

Equivalent input noise of the error amplifier 202 may be represented as:

${\overset{\_}{V_{op}^{2}} \approx {2\left( {{4{kT}\; {\gamma \left\lbrack {\frac{g_{m,{out}}}{g_{m,{in}}^{2}} + \frac{1}{g_{m,{in}}}} \right\rbrack}} + {{\frac{1}{C_{ox}}\left\lbrack {\frac{K_{out}g_{m,{out}}^{2}}{({WL})_{out}g_{m,{in}}^{2}} + \frac{K_{in}}{({WL})_{in}}} \right\rbrack}\frac{1}{f}}} \right)}},$

where

g_(m,in) is a transconductance of the input tube 2022, g_(m,out) is a transconductance of the output current mirror 2023, (WL)_(m) is a product of a width and a length of the input tube 2022, (WL)_(out) is a product of a width and a length of the output current mirror 2023, K_(in) is a carrier mobility of the input tube 2022, K_(out) is a carrier mobility of the output current mirror 2023, C_(ox) is a unit capacitance of gate oxide of a MOS device, k is a Boltzmann constant, T is a Kelvin temperature, and γ is a channel coefficient of the device.

To further improve noise performance of the LDO, a noise filter circuit 208 may be further disposed between the reference voltage source 201 and the error amplifier 202. The noise filter circuit 208 may be coupled to the reference voltage source 201 and the error amplifier 202, and is configured to perform noise filtering on the reference voltage provided by the reference voltage source 201, and send, to the error amplifier 202, the reference voltage on which noise filtering is performed.

In addition, in this embodiment of the present invention, an output voltage of the low dropout regulator may be directly used as a feedback voltage of the error amplifier 202. In order that the output voltage of the LDO can be regulated, in another embodiment of the present invention, a feedback circuit 207 may be configured to generate a feedback voltage according to the on-load voltage.

As shown in FIG. 5, the feedback circuit 207 may include a first bleeder resistor 2071 and a second bleeder resistor 2072. A terminal of the first bleeder resistor 2071 is connected to the positive input of the error amplifier 202, and another terminal of the first bleeder resistor 2071 is connected to a battery ground. A terminal of the second bleeder resistor 2072 is connected to the positive input of the error amplifier 202, and another terminal of the second bleeder resistor 2072 is connected to the drain of the transistor 203 and the load. Therefore, a magnitude of the feedback voltage can be changed by regulating a resistance value of the first bleeder resistor and a resistance value of the second bleeder resistor 2072, so as to change a magnitude of the on-load voltage of the LDO.

It can be learned from the foregoing embodiment that, by adding a second compensation circuit, a value of a gain-bandwidth product and a size of a dominant pole can be significantly reduced, and a size of a secondary dominant pole can be increased. Therefore, by introducing the second compensation circuit, system stability is greatly improved, and a transconductance of an error amplifier in the present invention can be greater than a transconductance of a prior-art error amplifier. Therefore, the error amplifier in the present invention has better noise performance.

Corresponding to the LDO embodiment in the present invention, an embodiment of the present invention further provides a method for improving stability of a low dropout regulator.

As shown in FIG. 6, the method for improving stability of a low dropout regulator includes the following steps.

Step 601: Receive a reference voltage and a feedback voltage.

An LDO noise regulation apparatus first receives the reference voltage and the feedback voltage. The reference voltage is provided by a reference voltage source, and the feedback voltage is related to an on-load voltage of the LDO.

Step 602: Compare the feedback voltage with the reference voltage, and generate a control voltage according to a result of comparing the feedback voltage with the reference voltage.

After receiving the feedback voltage and the reference voltage, the LDO noise regulation apparatus may compare the feedback voltage with the reference voltage, and generate the control voltage according to the result of comparing the feedback voltage and the reference voltage. The reference voltage may be a voltage directly output by the reference voltage source, or may be a voltage obtained after a voltage directly output by the reference voltage source is filtered by a noise filter circuit. The feedback voltage may be the on-load voltage of the LDO, or may be a voltage generated by a feedback circuit according to the on-load voltage of the LDO. For a specific manner of generating the reference voltage, reference may be made to the foregoing descriptions, and details are not described herein.

Step 603: Generate a regulating current under control of the control voltage.

After the control voltage is generated, the LDO noise regulation apparatus may generate the regulating current according to the control voltage. The LDO noise regulation apparatus may generate the regulating current by using a regulating circuit. The regulating circuit may be a power MOS device such as a transistor. For a specific manner of generating the regulating current, reference may be made to the foregoing descriptions, and details are not described herein.

Step 604: regulate a dominant pole and a secondary dominant pole of the low dropout regulator according to the regulating current.

After the regulating current is generated, the LDO noise regulation apparatus may regulate the dominant pole and the secondary dominant pole of the low dropout regulator by using a circuit structure or a signal processing process that has an effect of zero-pole splitting, for example, a compensation circuit including a nulling resistor and a Miller compensation capacitor. In this way, a regulated dominant pole is less than the dominant pole before the regulation, and a regulated secondary dominant pole is greater than the secondary dominant pole before the regulation. For a specific implementation manner, reference may be made to the foregoing embodiments, and details are not described herein.

Step 605: Further regulate the dominant pole and the secondary dominant pole of the low dropout regulator according to the regulating current on the basis that the dominant pole and the secondary dominant pole of the low dropout regulator are regulated according to the regulating current, and regulate a gain-bandwidth product of the low dropout regulator according to the regulating current.

Another compensation circuit may be further used to regulate the dominant pole and the secondary dominant pole of the low dropout regulator according to the regulating current on the basis that the LDO noise regulation apparatus regulates the dominant pole and the secondary dominant pole of the low dropout regulator by using the circuit structure or the signal processing process that has the effect of zero-pole splitting; and regulate the gain-bandwidth product of the low dropout regulator according to the regulating current. The dominant pole and the secondary dominant pole of the low dropout regulator may be further regulated in a resistor compensation manner. For a specific implementation manner, reference may be made to the foregoing embodiments, and details are not described herein.

It can be learned that, by regulating a dominant pole and a secondary dominant pole of a low dropout regulator in a two-level regulation manner, a value of a gain-bandwidth product and a size of the dominant pole can be significantly reduced, and a size of the secondary dominant pole can be increased. Therefore, by introducing a second compensation circuit, system stability is greatly improved, and a transconductance of an error amplifier in the present invention can be greater than a transconductance of a prior-art error amplifier. Therefore, the error amplifier in the present invention has better noise performance.

In addition to the LDO in the foregoing embodiments, the embodiments of the present invention further provide a phase-locked loop, where an LDO in the phase-locked loop may be the LDO described in the foregoing embodiments.

A person skilled in the art may clearly understand that, the technologies in the embodiments of the present invention may be implemented by software in addition to a necessary general hardware platform. Based on such understanding, the technical solutions of the present invention essentially or the part contributing to the prior art may be implemented in a form of a software product. The software product is stored in a storage medium, such as a ROM/RAM, a hard disk, or an optical disc, and includes several instructions for instructing a computer device (which may be a personal computer, a server, or a network device) to perform the methods described in the embodiments or some parts of the embodiments of the present invention.

The embodiments in this specification are all described in a progressive manner, for same or similar parts in the embodiments, reference may be made to these embodiments, and each embodiment focuses on a difference from other embodiments. Especially, a system embodiment is basically similar to a method embodiment, and therefore is described briefly; for related parts, reference may be made to partial descriptions in the method embodiment.

The foregoing descriptions are implementation manners of the present invention, but are not intended to limit the protection scope of the present invention. Any modification, equivalent replacement, and improvement made without departing from the spirit and principle of the present invention shall fall within the protection scope of the present invention. 

What is claimed is:
 1. A low dropout regulator, comprising: a reference voltage source, configured to provide a reference voltage; an error amplifier having a first input terminal, a second input terminal and a first output terminal, the first input terminal being coupled to the reference voltage source and configured to receive the reference voltage, the second input terminal being configured to receive a feedback voltage, the error amplifier being configured to compare the feedback voltage with the reference voltage and produce a control voltage according to a result of comparing the feedback voltage with the reference voltage, and the first output terminal being configured to output the control voltage; a first compensation circuit having a first terminal and a second terminal; a second compensation circuit having a third terminal and a fourth terminal, the third terminal being coupled to the first output terminal, and the fourth terminal being coupled to the first terminal; and a regulating circuit having a third input terminal and a second output terminal, the third input terminal being coupled to the fourth terminal and configured to receive the control voltage through the second compensation circuit, the regulating circuit being configured to produce a regulating current under control of the control voltage, and the second output terminal being coupled to the second terminal and configured to output the regulating current; a load, coupled to the second output terminal, wherein an on-load voltage is formed when the regulating current passes through the load, and the feedback voltage is related to the on-load voltage.
 2. The low dropout regulator according to claim 1, wherein the regulating circuit comprises a transistor.
 3. The low dropout regulator according to claim 2, wherein the third input terminal is a gate of the transistor and the second output terminal is a drain of the transistor.
 4. The low dropout regulator according to claim 1, wherein the first compensation circuit comprises a first resistor and a capacitor.
 5. The low dropout regulator according to claim 1, wherein the second compensation circuit comprises a second resistor.
 6. The low dropout regulator according to claim 5, wherein the second resistor is a silicon diffusion resistor, a MOS device resistor, or a metal wiring resistor.
 7. The low dropout regulator according to claim 1, further comprising a noise filter circuit, being coupled between the reference voltage source and first input terminal, and being configured to perform noise filtering on the reference voltage.
 8. The low dropout regulator according to claim 1, wherein the feedback voltage is the on-load voltage.
 9. The low dropout regulator according to claim 1, further comprising a feedback circuit, wherein the feedback circuit is coupled to the second output terminal, and is configured to receive the on-load voltage and generate the feedback voltage according to the on-load voltage.
 10. The low dropout regulator according to claim 9, wherein the feedback circuit comprises a third resistor and a fourth resistor, a fifth terminal of the third resistor is coupled to the second output terminal, a sixth terminal of the third resistor is coupled to a seventh terminal of the fourth resistor, and an eighth terminal of the fourth resistor is coupled to ground.
 11. A phase-locked loop, comprising a low dropout regulator, wherein the low dropout regulator comprises: a reference voltage source, configured to provide a reference voltage; an error amplifier having a first input terminal, a second input terminal and a first output terminal, the first input terminal being coupled to the reference voltage source and configured to receive the reference voltage, the second input terminal being configured to receive a feedback voltage, the error amplifier being configured to compare the feedback voltage with the reference voltage and produce a control voltage according to a result of comparing the feedback voltage with the reference voltage, and the first output terminal being configured to output the control voltage; a first compensation circuit having a first terminal and a second terminal; a second compensation circuit having a third terminal and a fourth terminal, the third terminal being coupled to the first output terminal, and the fourth terminal being coupled to the first terminal; and a regulating circuit having a third input terminal and a second output terminal, the third input terminal being coupled to the fourth terminal and configured to receive the control voltage through the second compensation circuit, the regulating circuit being configured to produce a regulating current under control of the control voltage, and the second output terminal being coupled to the second terminal and configured to output the regulating current; a load, coupled to the second output terminal, wherein an on-load voltage is formed when the regulating current passes through the load, and the feedback voltage is related to the on-load voltage.
 12. The phase-locked loop according to claim 11, wherein the regulating circuit comprises a transistor.
 13. The phase-locked loop according to claim 12, wherein the third input terminal is a gate of the transistor and the second output terminal is a drain of the transistor.
 14. The phase-locked loop according to claim 11, wherein the first compensation circuit comprises a first resistor and a capacitor.
 15. The phase-locked loop according to claim 11, wherein the second compensation circuit comprises a second resistor.
 16. The phase-locked loop according to claim 15, wherein the second resistor is a silicon diffusion resistor, a MOS device resistor, or a metal wiring resistor.
 17. The phase-locked loop according to claim 11, further comprising a noise filter circuit, being coupled between the reference voltage source and first input terminal, and being configured to perform noise filtering on the reference voltage.
 18. The phase-locked loop according to claim 11, wherein the feedback voltage is the on-load voltage.
 19. The phase-locked loop according to claim 11, further comprising a feedback circuit, wherein the feedback circuit is coupled to the second output terminal, and is configured to receive the on-load voltage and generate the feedback voltage according to the on-load voltage.
 20. The phase-locked loop according to claim 19, wherein the feedback circuit comprises a third resistor and a fourth resistor, a fifth terminal of the third resistor is coupled to the second output terminal, a sixth terminal of the third resistor is coupled to a seventh terminal of the fourth resistor, and an eighth terminal of the fourth resistor is coupled to ground. 